Compared to a simple two-level inverter, multilevel inverters can provide higher operating voltage for a given device rating, lower voltage distortion because of smaller voltage steps, and reduced interference signals. A typical prior art three-level inverter circuit is shown in FIG. 1. The inverter circuit includes four switches 101-104, each switch being formed of an insulated gate bipolar transistor or IGBT (111-114) and a diode (121-124). Diodes 121-124, which carry freewheeling currents through the switches 101-104 during times that the switches conduct in the reverse direction (i.e., when current flows from source to drain), are included to prevent conduction through the intrinsic parasitic diodes that are inherent in IGBT devices and are anti-parallel to the channels of the IGBT devices.
The inverter topology shown in FIG. 1 is referred to as a neutral-point clamped (NPC) inverter, because diodes 125 and 126 serve to clamp their respective switched nodes to the neutral point, here represented as the midpoint of voltage supply 130, which supplies a voltage Vs1. There are three possible output voltages at output node 140: +(Vs1)/2 (when IGBT transistors 111 and 112 are ON and IGBT transistors 113 and 114 are OFF), 0 (when IGBT transistors 112 and 113 are ON and IGBT transistors 111 and 114 are OFF), and −(Vs1)/2 (when IGBT transistors 113 and 114 are ON, and IGBT transistors 111 and 112 are OFF). To permit current flow in either direction, the 0 level is normally achieved by turning on both IGBT transistors 112 and 113. During operation of this circuit, none of the four transistors (111-114) or six diodes (121-126) ever blocks a voltage in excess of about (Vs1)/2, even though the output voltage at node 140 swings across the entire range of Vs1 [i.e., the minimum output voltage is −(Vs1)/2, and the maximum output voltage is +Vs1)/2].
As shown in FIG. 1 and previously described, the transistors 111-114 are insulated gate bipolar transistors (IGBTs). These IGBTs could be devices rated to operate at voltages up to 600V, for example, and Vs1 could be as high as 1200V, which is two times the rated voltage of each of the IGBTs. Although 1200V rated devices exist, the cost and performance of 600V devices is often superior. In the simplest mode of operation, the output voltage at node 140 is switched between the three possible output voltage levels in sequence which repeats at the desired fundamental frequency of the output, such as 60 Hz, for example. In the case where a sinusoidal output is desired, lower distortion can be achieved if a pulse-width modulation (PWM) technique is employed to apply the switching voltages to the gates of each of the transistors 111-114. During the half cycle where the output voltage at node 140 should be positive, the gate of transistor 111 is pulsed ON and OFF at some switching frequency which is appreciably higher than that of the desired output. A PWM switching frequency of 10 kHz, for example, could be used to generate a 60 Hz output.